Q&A: I2C pulse width on uEZGUIs?

(This message was transferred over from our old forum)
Posted October 27, 2015
By Bill Fleming
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Question: Does the uEZGUI family meet the NXP recommendations for I2C timing cycles? (see www.nxp.com/documents/user_manual/UM10204.pdf table 10)

Answer: In the uEZ Software Release Version 2.06C FDI introduced new timing cycles for I2C fast-mode to meet NXP’s minimum rise time and pulse width requirements. The LPCXX88 supports adjusting the length of each pulse based on the clock divider. These were changed from 50% to 44.6% high/55.3% low. We are now meeting the pulse width requirements of 1.3uS low pulse width, and rise times of 36ns which is above the requirement of 20ns. Note that in uEZ 2.07 new timings were also added for I2C fast-mode-plus (1MHz speed). It is up to the customer to verify these timings on expansion hardware as this mode is not supported or tested on the uEZGUI’s local I2C bus. In general, if a speed other than 400 KHz is used on a uEZGUI’s expansion pins, it should be verified against the NXP I2C specifications. Any needed adjustments can be made in the platform specific I2C files. For the LPC1788 these are the ILPC17xx_40xx_I2CSetSpeed function inside of LPC17xx_40xx_I2C.c. See the verification pictures below.